1. Field of the Invention
The present invention relates to an insulated gate semiconductor device having a gate protection circuit, such as power vertical MOSFETs or insulated gate bipolar transistors (referred to hereinafter as "IGBTs").
2. Description of the Prior Art
In power vertical MOSFET or IGBT semiconductor devices, a p-region is formed in the upper surface of an n-type silicon substrate. An n-type source region is then formed inside the p-region. A gate oxide layer is formed on a portion of the p-region and the n-type substrate surface, and a gate layer is then formed on the gate oxide layer.
The resulting structure forms a channel through the p-region between the n-type source region and the n-type substrate along the gate oxide layer. A major current flows from a source electrode, connected to the source region and p-region, to a drain electrode disposed on the lower surface of the n-type silicon substrate.
The insulated gate semiconductor devices of such structure must be protected from electrostatic destruction caused by a surge in the voltage applied to the gate layer. Particularly, in the field of automotive electronics, it is essential that a gate protection circuit be provided to the device. To satisfy this, a pluarlity of protection diodes connected back to back in series are used.
Japanese Patent Application Laid-Open Publication No. 61-296770 describes a gate protection circuit for insulated gate semiconductor devices in which impurity is introduced into a semiconductor layer of a gate electrode to form an n-p-p-n junction therein, and Zener diodes, which are connected back to back in series are connected across a path formed between source and gate electrodes. Japanese Patent Application Laid-Open Publication No. 58-178566 describes a gate protection circuit in which gate protection diodes are formed by introducing impurity into a specific region in the semiconductor layer.
Similarly, Japanese Patent Application Laid-Open Publication No. 58-88461 and No. 58-87873 describe a gate protection circuit in which gate protection diodes connected back to back in series are formed by introducing impurity into a semiconductor layer, of a polysilicon layer disposed on a semiconductor substrate, for example.
The protection diodes used in prior art gate protection circuits are Zener diodes. These diodes are formed by introducing impurity into the semiconductor layer disposed on a semiconductor substrate or directly into the semiconductor substrate. The breakdown voltage of a Zener diode is 5 V or less. The breakdown voltage required for the gate protection circuit is normally 10 V or more.
To this end, the gate protection circuit constituting Zener diodes comprises a plurality of Zener diodes connected in series in both directions. Further, the breakdown voltage obtained is limited to a multiple of a Zener voltage of a single p-n junction. In such a gate protection circuit, it is very difficult to freely set the breakdown voltage according to the use of the semiconductor device.